General information
As you can tell if you look at the code, this is a somewhat hackish program.
It's just supposed to make finding the "sweet-spot" of an Athlon 64 overclock a
bit easier.
A more detailed readme will be done if there's enough interest. Basically:
- "xyz Min" = Minimum acceptable speed for component xyz.
- "xyz Max/Ideal" = Maximum speed this component runs at (ie: what
you would like it to run at ideally).
- "xyz Graph min" = Bottom of the vertical axis on the graph for
that component. The top of the graph is the max/ideal value. The exception
to this is the HTT min/max which corresponds to the horizontal axis.
White regions in the graph are the regions where all components are above their
minimum. The darker areas are regions where one or more are below their minimum
values. The regular darker vertical lines are the integer HTT speeds (ie: values
you can actually use). The lighter horizontal lines are the component minimum
values.
How Optimal HTT works
LDT speed: It just takes the highest LDT multiplier that gives a LDT
speed below the maximum.
CPU and RAM speed: There's a tradeoff between these two. Due to the odd
nature of the Athlon 64's memory controller, you may be able to get a higher
memory speed at the cost of a lower CPU speed. The program chooses to minimise
the value of
((CPUIdeal - CPU) / (CPUIdeal - CPUMin))2 + ((MemIdeal - Mem) / (MemIdeal - MemMin))2
ie: the least-squares minimum.
How the Athlon 64 works

The HTT speed, CPU multiplier, and LDT multiplier are set in the BIOS. These
give the LDT speed (the speed of the link between the CPU and the peripherals
such as the PCI and AGP busses) and the CPU speed directly (CPU speed = HTT
speed * CPU multiplier, etc).
To get the memory speed, you need to take into account the memory ratio
selected. Since the memory controller is integrated into the CPU, it must run at
a fraction of the CPU speed. For whatever reason, half integer (eg: 10.5)
divisors are not allowed. So to get the memory divisor, the CPU chooses the
smallest integer such that the memory speed is below (or equal to) the speed
requested.
For example, if the HTT speed was 200MHz and the ratio set to 5:6, then the
requested speed is 166MHz. If the CPU multiplier is set to 10x, then the CPU
speed is 2000MHz. So, the smallest integer M such that 2000/M
<= 166.67 is M=12. In this case, 2000/12 = 166.67MHz, so the memory
speed is perfect.
However, if the multiplier was 11x, then the CPU speed would be 2200MHz and M
would come out to be 14 (as 2200/14 = 157.14 < 166.67 and 2200/13 = 169.23 >
166.67). So the actual memory speed used is 157.14MHz, not 166.67MHz.
Mathematically, M = ceiling(CPU multiplier / Ratio)
Where ceiling(x) is the smallest integer that is greater than or equal
to x. So ceiling(1.9) = 2, ceiling(1.1) = 2, etc etc.
For example, with the ratio at 5/6 and the CPU multiplier at 11, then
M = ceiling(11 / (5/6))
= ceiling(13.2)
= 14
As expected. This can be combined into one formula for the memory speed:
Memory speed = CPU multiplier * HTT / ceiling(CPU multiplier / Ratio)
Note that there are 5 exceptions to this rule. The first is that there is no 4
divider. So if the multiplier is 4 and the 1:1 ratio is selected, a divider of 5
is used instead of the expected divider of 4. Secondly, the 11:12 ratio has 4
unexpected points at multipliers of 5.5, 11, 16.5, and 22. Taking the 11
multiplier as an example, the expected divider is ceiling(11/(11/12)) =
ceiling(12) = 12. However, the actual divider used is 13. This has been
double-checked using memory bandwidth measurements and agrees with the values
obtained by Oskar Wu. The reasons for this deviation are not known; possibly a
programming error at AMD (floating-point accuracy issues), or possibly it's not
quite an 11:12 ratio. Who knows.
is
References
For the "reserved" ratios, Oscar Wu's table was used:
http://oskarwu.myweb.hinet.net/A64D1.jpg
Apart from the 183MHz setting, I don't know of any other supporting evidence for
these values.
For the "reserved" LDT multipliers, they're mentioned in quite a few places on
the 'net. For example:
http://www.xtremesystems.org/forums/showthread.php?t=44315
For the general ide of how the Athlon 64 memory dividers worked, it's all over
the net (though the trick is figuring out what stuff is right and what isn't).